Bizarre A18 claims

NotEntirelyConfused

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In the last few days I've seen rumors that the A18 will come in two versions, the A18 which is the A17 redone on N3E, and the A18Pro which is newer.

This seems absolutely bizarre to me. I can't imagine why Apple would want to spend the time and money (quite a lot, N3E is not a shrink of N3B) redoing the layout of the A17's cores when it's also doing a new core (presumably either using the M4's, or a further improvement on that). The notion that it would spend extra money to build a worse product for segmentation purposes seems nuts. Assuming there is an A18Pro, I would expect them to segment by giving the A18Pro more GPU cores, possibly more E cores, maaaaaybe another P core. (I think they'll give both versions their best NPU - another reason I can't imagine them redoing A17.)

And then there's everything else, the "uncore" - why lay out the A17's on N3E when they're already doing the A18's?

I can, vaguely, imagine them naming the lower-end version of the A18 "A17+" or similar. But I'd bet against it.

Am I missing something here?
 
In the last few days I've seen rumors that the A18 will come in two versions, the A18 which is the A17 redone on N3E, and the A18Pro which is newer.

This seems absolutely bizarre to me. I can't imagine why Apple would want to spend the time and money (quite a lot, N3E is not a shrink of N3B) redoing the layout of the A17's cores when it's also doing a new core (presumably either using the M4's, or a further improvement on that). The notion that it would spend extra money to build a worse product for segmentation purposes seems nuts. Assuming there is an A18Pro, I would expect them to segment by giving the A18Pro more GPU cores, possibly more E cores, maaaaaybe another P core. (I think they'll give both versions their best NPU - another reason I can't imagine them redoing A17.)

And then there's everything else, the "uncore" - why lay out the A17's on N3E when they're already doing the A18's?

I can, vaguely, imagine them naming the lower-end version of the A18 "A17+" or similar. But I'd bet against it.

Am I missing something here?
It’s plausible to me only if, when they designed A17, they used a ”least common denominator” set of design rules so that it would work with both processes. This seems very unlikely to me because my understanding is that Apple uses TSMC’s standard cell library instead of creating its own (at least they did as of a year or two ago).
 
My money is on one actual A18 in two variants with both a CPU and a GPU core cut on the regular version. Though I guess how much they cut is also yield dependent. 8GB ram in both to support Apple intelligences.
 
I agree that doesn’t make a lot of sense. Where did you see this? The latest rumor, with evidentiary support, seems to be that there will be one A18 chip. There is the possibility that Apple may bin said chip into separate A18 and A18Pro versions but it’ll all be A18.
Yes, I saw that article. It makes much more sense!

I no longer remember where I saw the rumor about reimplementing the A17 on N3E but it must have been either MR, AI, or their fora (though I don't spend a lot of time reading there, SNR is bad), and I think it sourced Gurman thoughit could have been Kuo or another of that ilk.
 
Yes, I saw that article. It makes much more sense!

I no longer remember where I saw the rumor about reimplementing the A17 on N3E but it must have been either MR, AI, or their fora (though I don't spend a lot of time reading there, SNR is bad), and I think it sourced Gurman thoughit could have been Kuo or another of that ilk.

Forum denizens generally don’t understand that most of the work in designing a chip is in the physical design - generating the polygons for a particular process. Typically we got 95%-ready RTL handed to us after a month or two once the project started. After that, the RTL folks mostly dealt with bugs and with making changes requested by the physical design folks to make the damned thing implementable and fast enough. (As far as I can remember, I never wrote the actual RTL. I designed some of the ISA, then skipped right over RTL and dealt with physical implementation. Weird, now that I think about it. At Sun I probably wrote my own RTL but I was only there for a few months). Anyway, probably 80-90% of the duration of the project is iterating on the physical design. So when you get handed a new process node, there is an awful lot of work to do unless you can just uniformly shrink everything (and even then, you still have to change a lot because wire thicknesses and voltage seldom scale with the lateral geometries.)
 
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