M5 Pro and Max unveiled

[leman]

Source: https://www.apple.com/newsroom/2026...supercharge-the-most-demanding-pro-workflows/

Highlights:

- Multi-chip design (Apple Fusion Architecture)
- Redesigned CPU hierarchy: 6 performance cores (now called super cores) and 12 what appears to new multiprocessing-focused cores (now called performance cores)
- Higher RAM bandwidth (by ~12%, up to 614GB/s on the 40-core M5 Max)
- Number of GPU cores remains unchanged from the previous generation

Edit: they really missed the opportunity to call them Max Cores

 

[Jimmyjames]

Must be 9600MT ram with 614GB bandwidth.

Curious how performance cores differ from efficiency cores.

 

[casperes1996]

Looks wild. Didn’t expect the core bump and new type of core. Looking forward to benchmarks.
I’ve seen 614GB/s floating around for the Big Max but no idea about validity

 

[casperes1996]

Must be 9600MT ram with 614GB bandwidth.

Curious how performance cores differ from efficiency cores.

Surely the performance cores are the P cores from base M5 and the super cores are new, right? Then the naming fits

 

[Jimmyjames]

Surely the performance cores are the P cores from base M5 and the super cores are new, right? Then the naming fits

I think the Super cores are just renamed P cores and the new P cores are different from E cores… if it isn’t confusing enough!

 

[The Hardcard]

Source: https://www.apple.com/newsroom/2026...supercharge-the-most-demanding-pro-workflows/

Highlights:

- Multi-chip design (Apple Fusion Architecture)
- Redesigned CPU hierarchy: 6 performance cores (now called super-performance cores) and 12 efficiency/sustain cores (now called performance cores)
- Higher RAM bandwidth (could not find concrete numbers)
- Number of GPU cores remains unchanged from the previous generation

The performance cores appear to be different than the M5 efficiency cores. At least M5 Pro and M5 Max have super cores and performance cores whereas M5 has super cores and efficiency cores.

 

[leman]

Initial thoughts: the most significant changes are obviously the move to MCM and the complete redesign of the CPU hierarchy. I did not see a more detailed explanation of the Fusion Architecture (maybe it is somewhere on the page, I did not look too hard), and I would guess that they have a CPU+IO die and a GPU die to get better die reuse.

As to the new CPU core design and naming, this really took me by surprise. It looks like Apple is taking a very similar path to what Intel did a few years ago. Unsure how I feel about it to be honest. I'd like to know how the new cores are organized. Is that three 6-cluster cores (one "big" and two "small") or an entirely new hybrid arrangement of three "supercores" and six "cores"? Time will tell. I suppose the first option is more likely. I wonder what this means for the SME performance. Do we get only one big SME engine and two small ones?

 

[leman]

I think the Super cores are just renamed P cores and the new P cores are different from E cores… if it isn’t confusing enough!

The performance cores appear to be different than the M5 efficiency cores. At least M5 Pro and M5 Max have super cores and performance cores whereas M5 has super cores and efficiency cores.

Ah yes, the press release seems to indicate something like that. I've updated the first post.

 

[Cmaier]

somebody needs to benchmark these bad boys

 

[NotEntirelyConfused]

Initial thoughts: the most significant changes are obviously the move to MCM and the complete redesign of the CPU hierarchy. I did not see a more detailed explanation of the Fusion Architecture (maybe it is somewhere on the page, I did not look too hard), and I would guess that they have a CPU+IO die and a GPU die to get better die reuse.

Man do I have a lot of questions... many of which may never be answered. :-(

Are they running the entire memory bus through the CPU chip? Or through the GPU die? Since the GPU die is the only difference between the Pro and Max, perhaps the latter? I guess the alternative is to just not use half the bus width on the Pro's CPU die. Seems wasteful.

As to the new CPU core design and naming, this really took me by surprise. It looks like Apple is taking a very similar path to what Intel did a few years ago. Unsure how I feel about it to be honest. I'd like to know how the new cores are organized. Is that three 6-cluster cores (one "big" and two "small") or an entirely new hybrid arrangement of three "supercores" and six "cores"? Time will tell. I suppose the first option is more likely. I wonder what this means for the SME performance. Do we get only one big SME engine and two small ones?

So, the claim is that the supercores are just the M5 P cores. Makes sense. Maybe they're clocked up 100MHz or so.

The new not-E cores are definitely... not E cores. Accounting for lower P core count, total core count, sublinear multicore performance scaling, etc., and using reported M4 and M5 performance numbers as a baseline, I think the new E-ish cores are roughly 55% faster than the old ones. That's assuming Apple's reported MP 30% uplift is exactly right. If that's only a "best case" number, my number would shrink accordingly.

That means the new Eish cores are a bit over 150% of the performance of the base M5 E cores, and about 2/3 the performance of the M5 P cores. That's pretty good! Or at least, it is if they're still very power efficient. And I'm betting that they are close to the old E cores that way, or Apple wouldn't have dumped the Es entirely (and in fact, that must be right, given the battery life claims).

My initial reaction to this before I looked at the numbers was "meh". I mean, I was happy enough with the new machines but it seemed pretty much what I expected, though the core mix was odd. But now that I'm actually looking at these numbers... this is really pretty impressive!

It's also vaguely interesting that Apple chose a path closer to Intel's than AMD's in terms of making a smaller core. But that comparison may be misleading, as there may be no underlying similarities in tech.

 

[NotEntirelyConfused]

Small AI note: I figured out how to do the assessment in my previous post, and started to search for numbers to do the actual computation. Then Google's AI search thing butted in and I thought "why not?". So I told it what I was trying to do and to figure out all the actual numbers. It came back impressively quickly... with a completely wrong answer, because it somehow decided that the new configuration was 12S6P. However once I told it it had it backwards, and it was really 6S12P, it gave me a large, correct, well-stated answer. Very convenient overall and it saved me a bunch of time. It also threw in an interesting prefatory comment that surprised me:

That is a fascinating architectural pivot—Apple moving to a "thin" top-heavy design with fewer P-cores (Super Cores) and a larger bank of "better-than-E" cores (which we can call M-cores for this analysis) changes the math significantly.

That's a level of understanding (yes I'm using that term loosely), and pulled-in related background knowledge, that I didn't expect.

These things still have lots of problems but they are getting progressively better. I thought it likely they'd hit a ceiling already, but so far, they're still moving ahead at a pretty good clip.

 

[Nycturne]

I think the Super cores are just renamed P cores and the new P cores are different from E cores… if it isn’t confusing enough!

Yeah, this is probably one of the more muddled announcements I’ve seen in a while because of the nomenclature changes. 30% uplift in MT is still welcome on the M5 Pro vs the M4 Pro CPU, but it’d probably still not look great if they said it was a 6P12E arrangement, even if the efficiency cores are just that much better.

But I suspect that the goal here was to minimize “waste” on the high end cores while still providing a multi-threaded performance boost. Even on Mac, there’s probably not many situations where all 10 performance cores get saturated outside of heavy MT work, so you could probably get MT uplift just through smarter use of the die footprint.

It's also vaguely interesting that Apple chose a path closer to Intel's than AMD's in terms of making a smaller core. But that comparison may be misleading, as there may be no underlying similarities in tech.

What do you mean by this?

 

[leman]

Man do I have a lot of questions... many of which may never be answered. :-(

Are they running the entire memory bus through the CPU chip? Or through the GPU die? Since the GPU die is the only difference between the Pro and Max, perhaps the latter? I guess the alternative is to just not use half the bus width on the Pro's CPU die. Seems wasteful.

Ok, so here is my speculation, based on what I think is likely looking at the published patents. To be absolutely clear, it's a low-confidence guess, I am not married to it, and I won't be sad if it ends up being incorrect.

As I mentioned, what I think might be happening is that one die contains the CPU cores and the basic IO, while the other die contains the GPU (and possibly parts or the entire SoC-level cache?). The memory controllers are likely to be wherever the SoC-level cache is, since each memory controller owns a slice of the cache. So they might be on both chips, or just on the GPU die, if that's where the cache lives. If the interconnect technology is advanced enough, there won't be any difference to a classical monolithic chip — you join together the on-chip networks and they function as a single unit.

The new not-E cores are definitely... not E cores. Accounting for lower P core count, total core count, sublinear multicore performance scaling, etc., and using reported M4 and M5 performance numbers as a baseline, I think the new E-ish cores are roughly 55% faster than the old ones. That's assuming Apple's reported MP 30% uplift is exactly right. If that's only a "best case" number, my number would shrink accordingly.

Yeah, this is probably one of the more muddled announcements I’ve seen in a while because of the nomenclature changes. 30% uplift in MT is still welcome on the M5 Pro vs the M4 Pro CPU, but it’d probably still not look great if they said it was a 6P12E arrangement, even if the efficiency cores are just that much better.

But I suspect that the goal here was to minimize “waste” on the high end cores while still providing a multi-threaded performance boost. Even on Mac, there’s probably not many situations where all 10 performance cores get saturated outside of heavy MT work, so you could probably get MT uplift just through smarter use of the die footprint.

It might be a way to improve MT performance without raising the thermal ceiling. Apple got away with just using P-cores for a while, thanks to their superior power efficiency. While they still are have the most efficient core by far, they have also been steadily raising the frequency and the power consumption.

What's interesting is that previous designs (I think M3) already started using the six-core cluster. We had two P-clusters and 1 E-cluster. Now we likely have one P1-cluster and two P2-clusters. For prosumer stuff, it might make sense, if it helps maintain the same thermal envelope (or maybe even improve it).

 

[casperes1996]

I understand it. But I am still bloody confused that what was called Performance Cores when the M5 were announced are *not* what is now called Performance cores on these new machines, but rather the Super cores are the same as the P cores on the base M5... Which may now also have its cores renamed? With this new nomenclature I suppose A19 also has Super cores.

I really thought we were getting 12 P cores and 6 cores of a new even higher tier, but I guess instead the new idea is a swarm of mid-tier cores and a handful of high performance cores, even though M4 also had 12 P cores, of the type that would now fall under Super Cores.
So under the new naming, M4 Max would be 4P- and 12S, and the M5 Max is 12P and 6S.

The benchmarks will tell the tale but it's certainly interesting.

 

[leman]

I understand it. But I am still bloody confused that what was called Performance Cores when the M5 were announced are *not* what is now called Performance cores on these new machines, but rather the Super cores are the same as the P cores on the base M5... Which may now also have its cores renamed? With this new nomenclature I suppose A19 also has Super cores.

I guess "performance" sounds better than "mid"

I still think they should have called them max cores and pro cores. Reinforces the existing brand. Now there are too many different labels.

 

[Cmaier]

All of this makes the Ultra much more interesting…

 

[dada_dave]

somebody needs to benchmark these bad boys

Can't wait to do the Notebookcheck CB R24 efficiency analysis. And of course Geekerwan does efficiency analysis for single threaded SPEC. Hopefully they'll be able to do it for both the S-core and P-core (had to stop myself from writing P-core and E-core, that's going to take some getting used to!)

 

[Nycturne]

As I mentioned, what I think might be happening is that one die contains the CPU cores and the basic IO, while the other die contains the GPU (and possibly parts or the entire SoC-level cache?). The memory controllers are likely to be wherever the SoC-level cache is, since each memory controller owns a slice of the cache. So they might be on both chips, or just on the GPU die, if that's where the cache lives. If the interconnect technology is advanced enough, there won't be any difference to a classical monolithic chip — you join together the on-chip networks and they function as a single unit.

This all seems reasonable to me. And Apple has had the die fusion tech since the M1 Ultra, so it would make sense that it would be feasible to use it for the Mac Book Pro by now.

It might be a way to improve MT performance without raising the thermal ceiling. Apple got away with just using P-cores for a while, thanks to their superior power efficiency. While they still are have the most efficient core by far, they have also been steadily raising the frequency and the power consumption.

Agreed. I suspect they also have the data to back up the fact that doing this will regress few, if any, real-world scenarios. The work spilling over to the lower power cores from the high power ones aren’t going to be stuff that benefits from single threaded perf anyways.

My main complaint with Intel’s approach to efficiency cores was really the scheduler trying to be too clever and decide if a process’ main thread should get a performance core or not. Not something Apple has to worry about.

 

[Cmaier]

Can't wait to do the Notebookcheck CB R24 efficiency analysis. And of course Geekerwan does efficiency analysis for single threaded SPEC. Hopefully they'll be able to do it for both the S-core and P-core (had to stop myself from writing P-core and E-core, that's going to take some getting used to!)

I’m going to keep calling them P- and E-, unless someone spills their codenames.

 

[dada_dave]

I’m going to keep calling them P- and E-, unless someone spills their codenames.

Trouble is, A- and base M- series still have the original E-cores which appear to be quite different from whatever these are and may do so going forwards as well. So I guess P, M, and E?