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I think I get what you are trying to say here, but this is more a fundamental issue of a process being moved mid-execution between two cores with different capabilities, and not being aware of the change in capabilities. So end result is if you cached the availability of AVX512, get moved to the smaller core without it during a preemptive switch, and then tried to use the instructions you just asked about before the switch occurred, you just crash. And that process state is not something the OS can go fix.

There are ways to do it, but the more I think about it, the more of a mess it becomes. It's just easier to keep the cores instruction compatible than trying to get folks to fix their code to not only be responding to signals that the core type has changed, but also making any state that is generated from checking CPU feature bits per-thread, rather than per-process. Intel's not the only one that faced this problem. There were Android devices that had missing capabilities on the efficiency cores which would cause certain processes to crash.