It’s all about chiplets - going all-in on the Lego-building capability of the design, which I think is neat. We’ll see how performance and perf/W stacks up when it comes out in December.
Not much on the subject of core μarch, but a whole lot on "disaggregation". What a terrible word. Why not just say "modularization"? Unless that is inaccurate.
Not much on the subject of core μarch, but a whole lot on "disaggregation". What a terrible word. Why not just say "modularization"? Unless that is inaccurate.
Not much on the subject of core μarch, but a whole lot on "disaggregation". What a terrible word. Why not just say "modularization"? Unless that is inaccurate.
I wondered about that as well - I agree that modularization fits better for what they’re doing but I guess they went with disaggregation to emphasize that they are pulling the monolithic chip apart rather than modularity of how they’ve done it? I dunno - I’m assuming that’s a word that Intel used rather than Anandtech coming up with it on their own since Anandtech kept using it over and over and over again to describe Intel’s strategy.
I'm a bit surprised that they are doing this for mobile as well. I'd expect that no matter how efficient the tile-to-tile connections are, they will always have some (low) energy overhead over keeping the signal within one IC. But this approach makes sense from cost-saving perspective.
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