I don't think that's correct for GPU architectures such as Nvidia's Lovelace and Intel’s Xe2, which have dedicated pipes for matrix operations. So while the traditional vector pipes do rasterization, the matrix pipes can simultaneously do upscaling.
I don’t know about Intel, but as far as I am aware no current Nvidia architecture can do matrix operation concurrently with other operations. Tensor cores work together with the rest of the system to do matrix multiplication, they are not a standalone unit. Nvidia scheduler can only dispatch a single instruction per cycle anyway.