MacBook Neo is the Chosen One

No one claimed magic, not even Apple. I imagine that multiplexing a single USB 3 lane into two ports would lead to suboptimal speeds or charging. It looks good on paper, I guess, if you did that. But realistically if you plugged in two usb 3 peripherals then you're splitting something and not getting the full benefit. And it probably adds complexity, both hardware and software wise

I still want to know how this interacts with Apple fabric. I don't think it's as easy as adding a chip on a board and calling it a day. I don't think it's as advanced as magic. I'm simply curious what they might have done to extend Apple fabric to accommodate a second port that isn't built in

One port is USB 3, and the other is USB 2. I’d bet money you can’t use both at their maximum throughput.

And none of this has anything to do with apple fabric, I’m sure.
 
Apple fabric is the custom interface between ports and associated, is it not? https://discussions.apple.com/thread/254919696

If you can use both ports at maximum throughput, what would that likely signal?

I've only seen the term "Apple Fabric" used in connection with the SSD. It could also refer to the on-chip network. Neither of these usages of the term have anything to do with USB ports. You need to connect the USB controller somewhere. The A18 has only one USB controller, and it's not feasible to add another one inside the SoC. So they went for the quick and dirty solution and placed a cheap hub in front of their "real" USB port.
 
I've only seen the term "Apple Fabric" used in connection with the SSD. It could also refer to the on-chip network. Neither of these usages of the term have anything to do with USB ports. You need to connect the USB controller somewhere. The A18 has only one USB controller, and it's not feasible to add another one inside the SoC. So they went for the quick and dirty solution and placed a cheap hub in front of their "real" USB port.
Isn't PCIe bus generally how a chip connects to the rest of the board, yes for the SSD, but also to ports? That's what I'm assuming Apple fabric is. Nonstandard bus for the chip. Im genuinely asking. I'm trying to learn more than what I know

I'm saying this to mean if it has limited connections internally then it's not even possible to have 2 USB 3 ports without compromise. If this is the case, how does this affect their decision and engineering effort in adding a second port.
 
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I've only seen the term "Apple Fabric" used in connection with the SSD. It could also refer to the on-chip network. Neither of these usages of the term have anything to do with USB ports. You need to connect the USB controller somewhere. The A18 has only one USB controller, and it's not feasible to add another one inside the SoC. So they went for the quick and dirty solution and placed a cheap hub in front of their "real" USB port.
Problem is that hub, it looks like, won’t support the USB 3.0 speeds needed for the fast port (at least not according to the documentation I found on-line). So I’m still not sure exactly what they are doing.
 
If you can use both ports at maximum throughput, what would that likely signal?
That something magical is going on. There’s no possible way to do it without them having modified the SoC die, afaik.
 
Problem is that hub, it looks like, won’t support the USB 3.0 speeds needed for the fast port (at least not according to the documentation I found on-line). So I’m still not sure exactly what they are doing.
USB 3 ports have two (type A) or four (type C) high speed diff pairs to support SERDES based links like USB 3.0, DP alt mode, or Thunderbolt. They also have a single USB2 diff pair. If you plug in a USB2 device, it only connects to the dedicated USB2 pair.

So, every full featured USB type C port is two different USB ports in one trenchcoat. Seems like they've put a 2.0 hub in front of A18 Pro's single 2.0 controller, splitting it for the two ports, but provided no hub for the 3.0 signals.

Why they didn't hubify the 3.0 signals, I don't know, but probably something along the lines of "it would be bad if DP alt mode forced the second port to suddenly be USB2 only". I don't know enough of the gory details here to be sure. In fact, I thought I'd read about things which might prevent what they did do, so it interests me that they pulled it off, with an off the shelf 2.0 hub IC, but probably whatever shenanigans there are can be done in firmware and drivers.
 
USB 3 ports have two (type A) or four (type C) high speed diff pairs to support SERDES based links like USB 3.0, DP alt mode, or Thunderbolt. They also have a single USB2 diff pair. If you plug in a USB2 device, it only connects to the dedicated USB2 pair.

So, every full featured USB type C port is two different USB ports in one trenchcoat. Seems like they've put a 2.0 hub in front of A18 Pro's single 2.0 controller, splitting it for the two ports, but provided no hub for the 3.0 signals.

Why they didn't hubify the 3.0 signals, I don't know, but probably something along the lines of "it would be bad if DP alt mode forced the second port to suddenly be USB2 only". I don't know enough of the gory details here to be sure. In fact, I thought I'd read about things which might prevent what they did do, so it interests me that they pulled it off, with an off the shelf 2.0 hub IC, but probably whatever shenanigans there are can be done in firmware and drivers.
Ah, so they are using two ports on the hub to send two USB 2.0 signal pairs to the two external ports, and then they send 4 differential pairs (from the SoC’s USB controller) to just the USB 3.0 external port? Makes sense.
 
Isn't PCIe bus generally how a chip connects to the rest of the board, yes for the SSD, but also to ports? That's what I'm assuming Apple fabric is. Nonstandard bus for the chip. Im genuinely asking. I'm trying to learn more than what I know

In the PC world, that is indeed a standard approach - use a universal bus (PCIe) and connect different controllers and devices to it. However, that’s not what Apple does. Their design goal is saving power and die space by providing exactly what’s needed for the product. In that sense, there is no „customizable bus“ as such. I think the „fabric“ you are talking about is just a dedicated link to the SSD, nothing more.
 
In the PC world, that is indeed a standard approach - use a universal bus (PCIe) and connect different controllers and devices to it. However, that’s not what Apple does. Their design goal is saving power and die space by providing exactly what’s needed for the product. In that sense, there is no „customizable bus“ as such. I think the „fabric“ you are talking about is just a dedicated link to the SSD, nothing more.
So does this Fabric connect USB/ Thunderbolt? I'm confused.

 
So does this Fabric connect USB/ Thunderbolt? I'm confused.


My understanding is that USB/Thunderbolt controllers are inside the SoC and that the SoC is more or less directly wired to the ports. I am not aware of a universal external bus on Apple Silicon. I might be mistaken however.

IMO, the difficulty is because Fabric is not really a technical term, but more of a marketing one. It seems to me when Howard talks about Fabric he means all the I/O integrated into a SoC.
 
My understanding is that USB/Thunderbolt controllers are inside the SoC and that the SoC is more or less directly wired to the ports. I am not aware of a universal external bus on Apple Silicon. I might be mistaken however.

IMO, the difficulty is because Fabric is not really a technical term, but more of a marketing one. It seems to me when Howard talks about Fabric he means all the I/O integrated into a SoC.
It's not a marketing term at all - it's a common engineering term for something sort of akin to a network switch or router, whose ports implement some kind of bus standard.

Here's an example. Never heard of this company before, it's just the first search hit I saw for "axi fabric". AXI is an Arm Holdings bus standard; it's the bus interface most Arm CPU IP complexes (core(s) + caches) present to the world. Lots of low to medium performance Arm-based SoCs are built on nothing but AXI fabrics.


In a higher performance SoC (like Apple Silicon) you might have AXI at some edges of the internal network-on-chip (NoC) that connects everything together, because there are going to be peripherals (or even CPUs) which speak AXI. However, the main internal NoC backbone or "fabric" will be something optimized for better area, wire count, power, throughput, or latency than plain AXI. "Apple Fabric" is just Apple's name for their presumably fully custom main NoC fabric. There are also IP vendors out there who will sell you the equivalent if you want to build your own SoC; was sniffing around for jobs at one of those companies once, but didn't end up applying.
 
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