M4 Mac Announcements

Was just about to write that ;) - so it is 8+6. I’m going with two clusters of 4 P-cores and the Max having a third such cluster + 20 GPU cores.
that’s a lot of CPU cores on the Max, if true.
 
that’s a lot of CPU cores on the Max, if true.
Aye 18 up from 16, though to be fair the two extra are E-cores and this is presuming that the rumor from Gurman that the Pro die is once again a cut down Max is true. If it’s not, then all bets are off.
 
also, tells us something about the M4 Pro core count…
And the Pro's max RAM increses from 36 GB on the M3 to 64 GB on the M4, indicating they're changing from a 3-chip config to either 2 or (more likely) 4:
M3 Pro: 18 GB (3 x 6 GB) or 36 GB (3 x 12 GB).
M4 Pro: 64 GB max = 4 x 16 GB ?

I wonder what this portends for the max RAM on the M4 Max, as well as for their respective memory bandwidths (which depend on the number of memory modules).
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Apparently Amazon accidentally posted the new mini. Size appears to be … small.
The listed specs include an up to 14-core CPU, up to 20-core GPU, up to 64GB of RAM, and up to 8TB of storage. Apple is only offering the new Mac mini in silver.
That's 2 more CPU cores than M3 Pro and 2 more GPU cores than M3 Pro.

I'd guess 14 cores is 8P+6E. It would be interesting to see if those 8 P-cores are on a single cluster, or divided across 2 clusters.

Also, the 'upto 64 GB RAM' suggests that M4 Pro returns to a 256b memory bus.
M2 ProM3 ProM4 Pro
12 core CPU
8P + 4E
12 core CPU
6P + 6E
14 core CPU
8P + 6E
19 core GPU18 core GPU20 core GPU
256 bit memory bus192 bit memory bus256 bit memory bus
 
Something I haven't seen anyone else mention is that the M4 Pro has a max of 64GB RAM, which would mean an even number of memory channels. The M3 Pro had 3x 64bit channels, which disappointed some people, as memory bandwidth was 3/4 of what was expected with 4x 64bit or 2x 128bit that were in M1/2 Pro generations.

The M4 Pro therefore should have 1.33x bandwidth from that, plus the uplift from LPDDR5-6400 going to LPDDR5X-7500 (1.17x) or LPDDR5X-8533 (1.33x), so 240 GB/s or 273 GB/s. I was really hoping for this given my work in ML, so I'm very excited. Also really hoping for TB5... Fingers crossed.
 
I wonder what this portends for the max RAM on the M4 Max, as well as for their respective memory bandwidths (which depend on the number of memory modules).
It would be most correct to say that the memory bandwidth depends on the bus width.

Because the width of a single memory module is variable.
Number of modulesWidth of a moduleTotal Bus Width
M2264 bit128 bit
M2 Max4128 bit512 bit
M3 Pro364 bit192 bit
M3 Max4128 bit512 bit
 
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That's 2 more CPU cores than M3 Pro and 2 more GPU cores than M3 Pro.

I'd guess 14 cores is 8P+6E. It would be interesting to see if those 8 P-cores are on a single cluster, or divided across 2 clusters.

Also, the 'upto 64 GB RAM' suggests that M4 Pro returns to a 256b memory bus.
M2 ProM3 ProM4 Pro
12 core CPU
8P + 4E
12 core CPU
6P + 6E
14 core CPU
8P + 6E
19 core GPU18 core GPU20 core GPU
256 bit memory bus192 bit memory bus256 bit memory bus
I'm going with 2 P-core clusters since if they're returning to the M2 Pro RAM configuration that is even more suggestive of the M4 Pro being a cutdown M4 Max and therefore the M4 Max would simply add a 3rd P-core cluster onto the additional die area with the extra 20 GPU cores. That's my guess anyway. That would also keep the P-core cluster design consistent across the three configurations, M4, M4 Pro, M4 Max. Makes it simpler to design. Keep 1 6 E-core cluster and just have 1, 2, and 3 4 P-core clusters to differentiate them (and extra GPU cores of course too, bigger SLC cache, more memory/bandwidth, etc ...).
 
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these E-cores aren’t to be sneezed at.
In terms of performance absolutely not, but they’re small in die area so adding 2 more shouldn’t break the bank
An E-core has about 1/3 the performance of the P-core. M4 Max having 2 more E-cores isn't going to substantially improve the multicore performance.

Majority of the multicore performance uplift is going to come from the P-cores, which are significantly improved (M3 -> M4, +25%).
 
An E-core has about 1/3 the performance of the P-core. M4 Max having 2 more E-cores isn't going to substantially improve the multicore performance.

Majority of the multicore performance uplift is going to come from the P-cores, which are significantly improved (M3 -> M4, +25%).
Of course but 2/3 an extra P-core is still nice ;)
 
It would be most correct to say that the memory bandwidth depends on the bus width.

Because the width of a single memory module is variable.
Number of modulesWidth of a moduleTotal Bus Width
M2264 bit128 bit
M2 Max4128 bit512 bit
M3 Pro364 bit192 bit
M3 Max4128 bit512 bit
Nope. You're trying to correct my statement, but something is not 'less correct' because it focuses on a single effect, particularly if that effect is especially germane. And the module number is germane if the 64 GB max RAM on the M4 Pro means that, at least for that config, they're going back to the same number of modules as on the M2 Pro, since it was specifically that change between the M2 Pro and M3 Pro that accounted for the reduction in bandwidth between those models.

Further, asserting it's "most correct" to say bandwidth depends on bus width implies that makes the listing comprehensive, which it does not. If you want to comprehensively account for what affects memory bandwidth, you also need to include the clock speed (and some other effects as well if you want to go from theoretical to practical bandwidth). Plus your chart says the M3 Max is 512 bits, but that's only for the high-end Max (400 GB/s). There's also an M3 Max that is 300 GB/s because Apple only enabled 24 of the 32 memory controllers, thus decreasing the effective bus width to 384 bits. Is your chart less correct because of that omission?
 
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Apple should screw with everyone and release a new Mac Pro tomorrow.
That's probably the only model for which they could sufficiently control leaks to have a chance of pulling off such a surprise, since it's the only one made in their US (Austin) assembly plant. Though keeping the chip under wraps would be a challenge....
no, here’s how they really screw with us. They launch with the base version of M3.

Here is how Apple REALLY screws with Pro users...

Announce the all-new Mac Pro Cube, with the all-new M4 Extreme chip...

Mac Studio & Mac Pro (Tower) still releasing in 2025, forcing Pro users who need more ASi horsepower RIGHT NOW to the new Cube... ;^p
 
Sad. If true, 8K@120Hz support could have meant a new Apple display.
How so? 120 Hz isn’t exactly Apple’s thing for large displays. Also, off topic, I used to know this person who went by Pikap, around monkey ave.
 
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How so? 120 Hz isn’t exactly Apple’s thing for large displays.
Well, at some point Apple will start using ProMotion (120Hz) on larger displays. Apple has been slowly pushing ProMotion to larger and larger displays, with the first Macs with 120Hz displays being the M1 MacBook Pros (November 2021), four years after the first ProMotion device (an iPad Pro, I believe).

If I remember correctly, the main impediment for ProMotion on a larger display was the bandwidth available, which wasn't enough for a 120Hz display of the same resolution as the current Pro Display XDR (6K). It doesn't really make sense for Apple to update their current display offerings until they can add ProMotion, it's the main "thing" missing.
 
Well, at some point Apple will start using ProMotion (120Hz) on larger displays. Apple has been slowly pushing ProMotion to larger and larger displays, with the first Macs with 120Hz displays being the M1 MacBook Pros (November 2021), four years after the first ProMotion device (an iPad Pro, I believe).

If I remember correctly, the main impediment for ProMotion on a larger display was the bandwidth available, which wasn't enough for a 120Hz display of the same resolution as the current Pro Display XDR (6K). It doesn't really make sense for Apple to update their current display offerings until they can add ProMotion, it's the main "thing" missing.
For sure, though ProMotion is 240Hz max, so you have to break it into throughput
 
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