Sometimes when you are using a SOC architecture, you may not have designed your PLL/clock dividers in such a way to allow the CPU clock to scale up without also scaling up other components that shouldn’t be scaled up. You can also run into aliasing problems - you increase the speed of the CPU, but whenever your CPU has to talk to other components, they can’t keep up, your FIFO buffers fill up, and then you have to stall. You can design around it (bigger FIFOs, more fine-grained clock domains, etc.) but then you are doing a lot of work that helps you for a very low volume product and which does nothing in your high volume product.
Is it sufficient to do the needed modifications on a per-core basis, or does this require global changes to the chip? E.g., would you need to increase the voltage across the entire chip to enable boosting on a single core?
I ask because I'm wondering if you could create one or two super-P-cores, capable of running at very high clocks, into the Pro and Max chips, without having to modify the chip as a whole. If so, this wouldn't be that costly.
As you know, since most apps continue to be single-threaded (including CPU-demanding apps like Mathematica, Maya, and AutoCAD) (are there also significantly CPU-sensitive games?), even boosting just a single core can have significant practical value. How much you enable it could be device-dependent, providing further product differentiation. E.g., maybe moderate boost on the Pro Mini and Pro/Max MBP's, and high boost on the Studios.
What about Intel chips? They appear to allow significant overclocking, beyond their stated specs. Are they wastefully over-provisioning their PLL/clock dividers, FIFO buffers, etc. to enable this?
And separately, what about boosting the all-core clocks on the GPU's--what considerations would apply there?